An operation of a power amplifier does not need to be at a fixed output power. More often, power amplifiers are used in a low output power backed off from their peak output power. However, simple back-off power amplifiers waste current by using more current than necessary. Thus, it is more desirable to have a separate amplification path for low output power operation in order to allow for reduced current conduction.
However, the isolation between high-power mode and low-power mode is often imperfect so that each mode is out of its optimum condition, thereby degrading the performance. An isolation switch can be used for the purpose of isolation. But the operation of power amplifiers often generates large voltage swing, which if exceeds the limit of safe device operation range, especially for CMOS devices, a certain form of damage to the device is inevitable.
FIG. 1 illustrates a block diagram of a conventional dual mode power amplifier for high power and low power. As shown in FIG. 1, there is a high-power mode amplifier 101 and a low-power amplifier 104. However, the high output power of the high-power mode amplifier 101 in FIG. 1 generates high voltage swing at the output, and the operation of the switch 103 is under a high voltage stress, which can often exceed the limit of safe operation range of a given device for the switch 103. Therefore, a simple connection of a switch 103 to the output node is not desirable. While an operation of the switch 103 is desirable for an optimum isolation between the high power mode and the low power mode, such a switch 103 should be carefully operated within an allowed operation margin.
Therefore, an integration of high power mode and low power mode to handle high voltage stress is desirable in an efficient power amplifier operation.